1. Field of the Invention
The present invention generally relates to a method for forming a flash memory cell, and more particularly relates to a method for forming a flash memory cell by using a high-density plasma enhanced chemical vapor deposition (HPDCVD) process.
2. Description of the Prior Art
Flash memory is the most potential memory in the semiconductor industry. Flash memory have been broadly applied to replicatively access date but not disappear as power breaking down, such as the film of digital camera or the basic input-output system of a mother board, because flash memory has the advantages of electrically erasable and programmable mechanisms. Flash memory can simultaneously proceed the erase and the program mechanisms to all flash memory cells in the whole memory""s array. Accordingly, how to advance the performance and reduce the cost of the flash memory becomes an important subject.
In the conventional method for forming a flash memory cell, the isolation oxide is formed and then a planarization process is performed, such as a chemical mechanism polishing (CMP) process or an etching back process. In the process steps, the CMP process is difficult controlled and the common disadvantages are dishing or erosion on the surface. Also in the process step, the etching back process is complicated and the common disadvantages are high costs. Hence, there are many solutions to overcome the disadvantages of the conventional planarization process. Moreover, it is more and more important to integrate the processes and to increase the efficiency of the flash memory.
An object of the invention is to provide a method for forming a flash memory cell by using a HDPCVD process to form the desired dielectric layer for isolation.
Another object of the invention is to provide a method for forming a flash memory cell, which can effectively increase the storage of electrical charges.
In order to achieve previous objects, the present invention provides a method for forming a flash memory cell and comprises following steps. First, a substrate is provided. Then, a gate dielectric layer, a first polysilicon layer and a hard mask layer are sequentially formed on the substrate. Next, portion of the nitride layer, the polysilicon layer and the gate dielectric layer are removed to form a plurality of holes to expose the substrate. Following, a dielectric layer is formed in those holes by the HDPCVD process with a first parameters set. Last, the hard mask layer on the first polysilicon layer is removed by the HDPCVD process with a second parameters set. Further, a second polysilicon layer could be conformally formed on the first polysilicon layer and the dielectric layer.